Faculty advisor

Mark Horowitz
650-725-3707
Gates 306
Interests: VLSI, Architecture, Biology, Microfluidics

Mark Horowitz received his BS and MS in Electrical Engineering from MIT in 1978, and his PhD from Stanford in 1984. Since 1984 he has been a professor at Stanford working in the area of digital integrated circuit design. While at Stanford he has led a number of processor designs including MIPS-X, one of the first processors to include an on-chip instruction cache, Torch, a statically-scheduled, superscalar processor and Flash, a flexible DSM machine. He has also worked in a number of other chip design areas including high-speed memory design, high-bandwidth interfaces, and fast floating point. In 1990 he took leave from Stanford to help start Rambus Inc, a company designing high-bandwidth memory interface technology.

Postdocs and staff

Stephen Richardson
Gates 456
Interests: Computer Architecture, Compilers, VLSI

Dr. Richardson, a long-time graduate of Stanford’s PhD program, authored Sun Microsystems’ first technical report. Later, he helped launch Micro Magic (www.micromagic.com), a processor design and design-tool consulting firm. Dr. Richardson has also worked at HP research labs, where he headed up a large-ish team of hardware-oriented computer architects. Recent work at Stanford has included reswearch on elegant solutions for conflict-free placement of FFT datapoints in local memory.

Students

Nikhil Bhagdikar
Gates 322
Interests: Computer Architecture, VLSI

Alex Carsello
Gates 302
Interests: Computer Architecture, VLSI, Image Processing, Chip Generators

Alex received a B.S. in Electrical and Computer Engineering from Washington University in St. Louis in 2017, and he is currently a Ph.D. student in Electrical Engineering at Stanford University. He is interested in reconfigurable computing, domain-specific architectures for image processing, and hardware design methodology. He is currently working within the AHA Agile Hardware Project on a next-generation CGRA (coarse-grained reconfigurable architecture) chip generator.

Amy Fritz
Allen 112
Interests: Optics, Engineering Education

Amy received a B.S. in Electrical Engineering and Physics from MIT in 2012 and a M.S. in Optics (Electrical Engineering) from Stanford University in 2016. She is currently a PhD student researching how people troubleshoot physical circuits and how to teach these skills effectively to students.

Steven Herbst
Allen 1st Floor, Desk 17
Interests: Analog/Mixed-Signal Circuit Design, VLSI, Design Automation, Circuit Simulation, Design Verification, FPGA Emulation

Steven Herbst is working to speed up the chip design process through research in FPGA emulation of mixed-signal circuits. Current work includes an open-source framework for emulating chip designs (anasymod), a Python-based generator that produces synthesizable models of analog/mixed-signal blocks (msdsl), and a SystemVerilog library for conveniently working with fixed-point numbers (svreal). Previous research includes methods to accelerate emulations of high-speed link designs. Prior to starting the PhD program at Stanford, he was an engineer at Apple (2013-2016) and Intersil (2011-2013). Steven holds B.S. and M.Eng. degrees in EE from MIT (2010, 2011).

Teguh Hofstee
Gates 381
Interests: Computer Architecture, "Systems", Graphics, Tooling, Debugging

I’m a PhD student in Computer Science currently working on building supporting infrastructure for the AHA program. I received a B.S. in Electrical and Computer Engineering from Carnegie Mellon University.

Olivia Hsu
Gates 302
Interests: Computer Architecture, VLSI, Circuits

Olivia received her B.S. in Electrical Engineering and Computer Science from University of California, Berkeley, and is currently a Ph.D. student in Computer Science at Stanford University. She is interested in novel computer architectures and hardware design methodologies.

Sung-Jin Kim
Allen 15
Interests: Analog and Mixed Signal Circuit Design, Synthesizable Analog Circuits, High Speed Serial Transceivers, Design Automation

Sung-Jin received his B.S. and M.S. in Electrical Engineering from KAIST in 2008 and 2010 respectively, and he is currently a Ph.D. student in Electrical Engineering at Stanford University. Prior to starting the PhD program, he worked for Samsung Electonics from 2010 to 2016. He is interested in synthesizable analog circuits and automated design flow for high speed serial links(SerDes). He is currently working for the Open Source Phy project.

Taeyoung Kong
Gates 356
Interests: Computer Architecture, VLSI

Taeyoung received a B.S. in Electrical and Computer Engineering from Seoul National University in 2017, and he is currently a Ph.D. student in Electrical Engineering at Stanford University. He is interested in hardware accelerator for deep learning and image processing and hardware design methodology. He is currently working within the AHA Agile Hardware Project.

Qiaoyi (Joey) Liu
Gates 302
Interests: Reconfigurable Computer Architecture, Efficient Deep Learning, Compiler

Qiaoyi(Joey) is a PhD student in Electrical Engineering Department at Stanford. He is working on agile hardware design methodology, generating computer vision / machine learning hardware from domain specific language, Halide. His research interests include high level synthesis, memory mapping compiler and domain-specific architecture.

Zachary Myers
Allen
Interests: Electronics, Mixed Signal IC Design

Zach is a EE PhD student. He received a B.S. in EE from UC Davis in 2013. He is interested in High-Speed Links and Open Source Hardware.

Jeff Setter
Gates 356
Interests: computer architecture, image processing, compilers

Jeff received a B.S. in Electrical and Computer Engineering from Cornell University in 2015. He is currently a Ph.D. candidate in Electrical Engineering at Stanford University. He is working on Halide2Hardware, an extension to a Halide’s DSL compiler to hardware RTL for image processing and machine learning applications.

Kavya Sreedhar
Gates 302
Interests: Computer Architecture, VLSI

Kavya is a PhD Student in EE at Stanford University. She received a B.S. in EE and BEM (Business, Economics, & Management) from Caltech in 2019.

Daniel Stanley
Gates
Interests: Electronics, Mixed Signal IC Design, Robotics, Design Productivity

Daniel is a PhD student currently working on tools for validating mixed-signal systems. He received his bachelor’s degree from Princeton University in 2018. His research interests include designing analog and digital hardware as well as creating tools that make hardware design faster and easier.

Jing Xiong
Gates 320
Interests: Image processing, computer vision, and related applications such as neuroimaging.

Jing Xiong is a Ph.D. student at Electrical Engineering department at Stanford University. She received her BS in Electrical Engineering from University of Minnesota Twin Cities with Summa Cum Laude and high distinction. She is currently working on a brain mapping project.

Keyi Zhang
Gates 356
Interests: Computer Systems, Machine Learning, FPGA PnR

Keyi Zhang is a PhD student in Computer Science at Stanford University. He is currently working on efficient FPGA place and route algorithms. He received a B.S. in Computer Science and Engineering from Bucknell University.

Alumni

Also see experimental alumni prototype page.

Byong Chan Lim | http://web.stanford.edu/~bclim
Blaine Rister | http://stanford.edu/~blaine
Feiqiao Brian Yu | http://brianyu.org
Andrew Danowitz |
Heonjae Ha | https://www.linkedin.com/in/heonjae-ha-276394100
John Brunhaver | http://graphics.stanford.edu/~jbrunhav
Jonathan Leaf | http://stanford.edu/~jcleaf
Jing Pu | https://www.linkedin.com/in/jingpu
Kahye Song |
Sabrina Liao |
Megan Wachs | http://meganwachs.com
Mehmet Ozan Kabak | http://stanford.edu/~ozank
Ardavan Pedram | http://www.cs.utexas.edu/~ardavan/
Rayfe Gaspar-Asaoka |
Steven Bell | http://stanford.edu/~sebell
Shahar Kvatinsky | http://webee.technion.ac.il/people/skva/
Suyao Ji | http://stanford.edu/~suyao
Artem Vasilyev |
Xuan Yang | http://stanford.edu/~xuany
Zain Asgar |