Mark Horowitz received his BS and MS in Electrical Engineering from MIT in 1978, and his PhD from Stanford in 1984. Since 1984 he has been a professor at Stanford working in the area of digital integrated circuit design. While at Stanford he has led a number of processor designs including MIPS-X, one of the first processors to include an on-chip instruction cache, Torch, a statically-scheduled, superscalar processor and Flash, a flexible DSM machine. He has also worked in a number of other chip design areas including high-speed memory design, high-bandwidth interfaces, and fast floating point. In 1990 he took leave from Stanford to help start Rambus Inc, a company designing high-bandwidth memory interface technology.

Dr. Richardson, a long-time graduate of Stanford’s PhD program, authored Sun Microsystems’ first technical report. Later, he helped launch Micro Magic (www.micromagic.com), a processor design and design-tool consulting firm. Dr. Richardson has also worked at HP research labs, where he headed up a large-ish team of hardware-oriented computer architects. Work at Stanford has included research on elegant solutions for conflict-free placement of FFT datapoints in local memory, and separately, process-independent chip design and testing.

Alex received a B.S. in Electrical and Computer Engineering from Washington University in St. Louis in 2017, and he is currently a Ph.D. student in Electrical Engineering at Stanford University. He is interested in reconfigurable computing, domain-specific architectures for image processing, and hardware design methodology. He currently works within the AHA Agile Hardware Project on a next-generation CGRA (coarse-grained reconfigurable architecture) chip generator.

Taeyoung received a B.S. in Electrical and Computer Engineering from Seoul National University in 2017, and he is currently a Ph.D. student in Electrical Engineering at Stanford University. He is interested in hardware accelerator for deep learning and image processing and hardware design methodology. He is currently working within the AHA Agile Hardware Project.

Qiaoyi(Joey) is a PhD student in Electrical Engineering Department at Stanford. He is working on agile hardware design methodology, generating computer vision / machine learning hardware from domain specific language, Halide. His research interests include high level synthesis, memory mapping compiler and domain-specific architecture.

Zach is a EE PhD student. He received a B.S. in EE from UC Davis in 2013. He is interested in High-Speed Links and Open Source Hardware.

Jeff received a B.S. in Electrical and Computer Engineering from Cornell University in 2015. He is currently a Ph.D. candidate in Electrical Engineering at Stanford University. He is working on Halide2Hardware, an extension to a Halide’s DSL compiler to hardware RTL for image processing and machine learning applications.

Kavya is a PhD Student in EE at Stanford University. She received a B.S. in EE and BEM (Business, Economics, & Management) from Caltech in 2019.

Daniel is a PhD student currently working on tools for validating mixed-signal systems. He received his bachelor’s degree from Princeton University in 2018. His research interests include designing analog and digital hardware as well as creating tools that make hardware design faster and easier.